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Turion 64 X2

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Image:Amd turion 64 x2.gif
The Turion 64 X2 logo

Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete with Intel's Core and Core 2 CPUs. The Turion 64 X2 was launched on May 17, 2006, after several delays. These processors use Socket S1, and feature DDR2 memory. They also include AMD Virtualization Technology and more power-saving features.

AMD first produced the Turion 64 X2 on IBM's 90 nm Silicon on insulator (SOI) process (cores with the Taylor codename). As of May 2007, they have switched to a 65 nm Silicon-Germanium stressed process[citation needed], which was recently achieved through the combined effort of IBM and AMD, with 40% improvement over comparable 65 nm processes[citation needed]. The earlier 90 nm devices were codenamed Taylor and Trinidad, while the newer 65 nm cores have codename Tyler.

Contents

Cores

Taylor & Trinidad (90 nm SOI)

Image:Turion64-X2.jpg
Turion64-X2 for Socket S1
  • Dual AMD64 core
  • L1 cache: 64 + 64 KiB (data + instructions) per core
  • L2 cache: 256 KiB (Taylor) or 512 KiB (Trinidad) per core, fullspeed
  • Memory controller: dual channel DDR2-667 MHz
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit, AMD-V (except TL-50)
  • Socket S1, HyperTransport (800 MHz, 1600 MT/s, 10.7 GB/s CPU-RAM + 6.4 GB/s CPU-I/O transfer rate)[1]
  • Power consumption (TDP): 31, 33, 35 watt max
  • First release: May 17, 2006
  • Clock rate: 1600, 1800, 2000, 2200 MHz
    • 31W TDP:
      • TL-50: 1600 MHz (256 KiB L2-Cache per core)
      • TL-52: 1600 MHz (512 KiB L2-Cache per core)
    • 33W TDP:
      • TL-56: 1800 MHz (512 KiB L2-Cache per core)
    • 35W TDP:
      • TL-60: 2000 MHz (512 KiB L2-Cache per core)
      • TL-64: 2200 MHz (512 KiB L2-Cache per core)

Tyler (65 nm SOI)

  • Dual AMD64 core
  • L1 cache: 64 + 64 KiB (data + instructions) per core
  • L2 cache: 512 KiB per core, fullspeed
  • Memory controller: dual channel DDR2-800 MHz (12.8 GB/s full-duplex CPU/RAM bandwidth)
  • 100 MHz granularity (Dynamic P-state Transitions)
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit, AMD-V
  • Socket S1, HyperTransport (1600 MHz)
  • Power consumption (TDP): 31, 33, 35 watt max.
  • First release: 2007
  • Clock rate: 1700, 1800, 1900, 2000, 2200, 2300, 2400 MHz
    • 31W TDP:
      • TK-53 1700 MHz (256 KiB L2-Cache per core)
      • TL-56 1800 MHz (512 KiB L2-Cache per core)
      • TK-57 1900 MHz (256 KiB L2-Cache per core)
      • TL-58 1900 MHz (512 KiB L2-Cache per core)
      • TL-60 2000 MHz (512 KiB L2-Cache per core)
    • 35W TDP:
      • TL-64 2200 MHz (512 KiB L2-Cache per core)
      • TL-66 2300 MHz (512 KiB L2-Cache per core)
      • TL-68 2400 MHz (512 KiB L2-Cache per core)

Future roadmap

In the first half of 2007, Hawk will update the current Turion 64 X2, adding support for DDR2-800, based on 65 nm process. AMD will launch Hawk processors together with Kite refresh platform, with Turion Ultra processor in 2008.

See also

References


    External links

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